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SN54LVC86A资料

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元器件交易网www.cecb2b.com SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS288I – JANUARY 1993 – REVISED OCTOBER 1998DEPIC™ (Enhanced-Performance ImplantedDDDDDDCMOS) Submicron ProcessESD Protection Exceeds 2000 V PerMIL-STD-883, Method 3015; Exceeds 200 VUsing Machine Model (C = 200 pF, R = 0)Latch-Up Performance Exceeds 250 mA PerJESD 17Typical VOLP (Output Ground Bounce)< 0.8 V at VCC = 3.3 V, TA = 25°CTypical VOHV (Output VOH Undershoot)> 2 V at VCC = 3.3 V, TA = 25°CInputs Accept Voltages to 5.5 VPackage Options Include PlasticSmall-Outline (D), Shrink Small-Outline(DB), Thin Very Small-Outline (DGV), andThin Shrink Small-Outline (PW) Packages,Ceramic Flat (W) Package, Ceramic ChipCarriers (FK), and DIPs (J)SN54LVC86A...J OR W PACKAGESN74LVC86A...D, DB, DGV, OR PW PACKAGE(TOP VIEW)1A1B1Y2A2B2YGND1234567141312111098VCC4B4A4Y3B3A3YSN54LVC86A...FK PACKAGE(TOP VIEW)1B1ANCVCC4B1YNC2ANC2B4567832120191817161514910111213descriptionThe SN54LVC86A quadruple 2-inputexclusive-OR gate is designed for 2.7-V to 3.6-VVCC operation and the SN74LVC86A quadruple2-input exclusive-OR gate is designed for 1.65-Vto 3.6-V VCC operation.The ’LVC86A devices perform the Booleanfunction Y = A ⊕ B or Y = AB + AB in positive logic.4ANC4YNC3BNC – No internal connectionA common application is as a true/complement element. If one of the inputs is low, the other input is reproducedin true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted atthe output.Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translatorsin a mixed 3.3-V/5-V system environment.The SN54LVC86A is characterized for operation over the full military temperature range of –55°C to 125°C. TheSN74LVC86A is characterized for operation from –40°C to 85°C.FUNCTION TABLE(each gate)INPUTSALLHHBLHLHOUTPUTYLHHLPlease be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.EPIC is a trademark of Texas Instruments Incorporated.PRODUCTION DATA information is current as of publication date.Products conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarily includetesting of all parameters.Copyright © 1998, Texas Instruments IncorporatedOn products compliant to MIL-PRF-38535, all parameters are testedunless otherwise noted. On all other products, productionprocessing does not necessarily include testing of all parameters.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•2YGNDNC3Y3A1元器件交易网www.cecb2b.comSCAS288I – JANUARY 1993 – REVISED OCTOBER 1998SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES logic symbol†1A1B2A2B3A3B4A4B12459101213= 131Y 62Y83Y114Y†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.Pin numbers shown are for the D, DB, DGV, J, PW, and W packages.exclusive-OR logicAn exclusive-OR gate has many applications, some of which can be represented better by alternative logicsymbols.EXCLUSIVE OR= 1These five equivalent exclusive-OR symbols are valid for an SN74LVC86A gate in positive logic; negation may be shown at any two ports.LOGIC-IDENTITY ELEMENT=EVEN-PARITY ELEMENT2kODD-PARITY ELEMENT2k + 1The output is active (low) ifall inputs stand at the samelogic level (i.e., A = B).The output is active (low) ifan even number of inputs(i.e., 0 or 2) are active.The output is active (high) ifan odd number of inputs(i.e., only 1 of the 2) areactive.absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 VInput voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 VOutput voltage range, VO (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 VInput clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mAOutput clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mAContinuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mAContinuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mAPackage thermal impedance, θJA (see Note 3):D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/WDB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 158°C/WDGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182°C/WPW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170°C/WStorage temperature range, Tstg –65. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . °C to 150°C‡Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, andfunctional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is notimplied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.NOTES:1.The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.2.The value of VCC is provided in the recommended operating conditions table.3.The package thermal impedance is calculated in accordance with JESD 51.2POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS288I – JANUARY 1993 – REVISED OCTOBER 1998recommended operating conditions (see Note 4)SN54LVC86AMINVCCSupplyvoltageSupply voltageOperatingData retention onlyVCC = 1.65 V to 1.95 VVCC = 2.3 V to 2.7 VVCC = 2.7 V to 3.6 VVCC = 1.65 V to 1.95 VVILVIVOLow-level input voltageInput voltageOutput voltageVCC = 1.65 VVCC = 2.3 VVCC = 2.7 VVCC = 3 VVCC = 1.65 VVCC = 2.3 VVCC = 2.7 VVCC = 3 V0122490–12–24VCC = 2.3 V to 2.7 VVCC = 2.7 V to 3.6 V00221.5MAX3.6SN74LVC86AMIN1.651.50.65 ×VCC1.720.35 ×VCC0.70.85.5VCC000.85.5VCC–4–8–12–244812249ns/VmAVVVVMAX3.6UNITVVIHHigh-level input voltageIOHHighleveloutputcurrentHigh-level output currentmAIOLLowleveloutputcurrentLow-level output current∆t/∆vInput transition rise or fall rateTAOperating free-air temperature–55125–4085°CNOTE 4:All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.POST OFFICE BOX 655303 DALLAS, TEXAS 75265•3元器件交易网www.cecb2b.comSCAS288I – JANUARY 1993 – REVISED OCTOBER 1998SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES electrical characteristics over recommended operating free-air temperature range (unlessotherwise noted)PARAMETERTESTCONDITIONSTEST CONDITIONSIOH = –100 =100µAIOH = –4 mAIOH = –8 mAIOH = –12 mA=12mAIOH = –24 mA=100µAIOL = 100 VOLIOL = 4 mAIOL = 8 mAIOL = 12 mAIOL = 24 mAIIICC∆ICCCiVI = 5.5 V or GNDVI = VCC or GND,IO = 0VCC1.65 V to 3.6 V2.7 V to 3.6 V1.65 V2.3 V2.7 V3 V3 V1.65 V to 3.6 V2.7 V to 3.6 V1.65 V2.3 V2.7 V3 V3.6 V3.6 V2.7 V to 3.6 V3.3 V50.40.55±51050050.20.450.70.40.55±510500µAµAµApFV2.22.42.2VCC–0.21.21.72.22.42.20.2VSN54LVC86AMINTYP†MAXSN74LVC86AMINTYP†MAXVCC–0.2UNITVOHOne input at VCC – 0.6 V,Other inputs at VCC or GNDVI = VCC or GND†All typical values are at VCC = 3.3 V, TA = 25°C.switching characteristics over recommended operating free-air temperature range (unlessotherwise noted) (see Figure 3)SN54LVC86APARAMETERFROM(INPUT)ATO(OUTPUT)YVCC = 2.7 VMINtpdMAX5.6VCC = 3.3 V± 0.3 VMIN1MAX4.6nsUNITswitching characteristics over recommended operating free-air temperature range (unlessotherwise noted) (see Figures 1 through 3)SN74LVC86APARAMETERFROM(INPUT)ATO(OUTPUT)YVCC = 1.8 VTYPtpdtsk(o)‡‡Skew between any two outputs of the same package switching in the same direction13.6VCC = 2.5 V± 0.2 VMIN1MAX7.6VCC = 2.7 VMINMAX5.6VCC = 3.3 V± 0.3 VMIN1MAX4.61nsnsUNIToperating characteristics, TA = 25°CPARAMETERCpdPower dissipation capacitance per gateTESTCONDITIONSf = 10 MHzVCC = 1.8 VTYP6.5VCC = 2.5 VTYP7.5VCC = 3.3 VTYP8.5UNITpF4POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS288I – JANUARY 1993 – REVISED OCTOBER 1998PARAMETER MEASUREMENT INFORMATIONVCC = 1.8 V ± 0.15 V1 kΩS12 × VCCOpenGND1 kΩTESTtpdtPLZ/tPZLtPHZ/tPZHS1Open2 × VCCOpenFrom OutputUnder TestCL = 30 pF(see Note A)LOAD CIRCUITVCC0 VtsuDataInputVCC/2thVCCVCC/20 VVOLTAGE WAVEFORMSSETUP AND HOLD TIMESVCCInputVCC/2tPLHOutputVCC/2VOLTAGE WAVEFORMSPROPAGATION DELAY TIMESVCC/20 VtPHLVOHVCC/2VOLOutputWaveform 2S1 at Open(see Note B)OutputControl(low-levelenabling)tPZLOutputWaveform 1S1 at 2 × VCC(see Note B)tPZHtwInputVCC/2VOLTAGE WAVEFORMSPULSE DURATIONVCCVCC/2VCC/20 VtPLZVCCVCC/2VOL + 0.15 VVOLtPHZVCC/2VOHVOH – 0.15 V0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESVCC/2VCC0 VTimingInputVCC/2NOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2 ns, tf ≤2 ns.D.The outputs are measured one at a time with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 1. Load Circuit and Voltage WaveformsPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•5元器件交易网www.cecb2b.comSCAS288I – JANUARY 1993 – REVISED OCTOBER 1998SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES PARAMETER MEASUREMENT INFORMATIONVCC = 2.5 V ± 0.2 V500 ΩS12 × VCCOpenGND500 ΩTESTtpdtPLZ/tPZLtPHZ/tPZHS1Open2 × VCCGND From OutputUnder TestCL = 30 pF(see Note A)LOAD CIRCUITVCC0 VtsuDataInputVCC/2thVCCVCC/20 VVOLTAGE WAVEFORMSSETUP AND HOLD TIMESVCCInputVCC/2tPLHOutputVCC/2VOLTAGE WAVEFORMSPROPAGATION DELAY TIMESVCC/20 VtPHLVOHVCC/2VOLOutputWaveform 2S1 at GND(see Note B)OutputControl(low-levelenabling)tPZLOutputWaveform 1S1 at 2 × VCC(see Note B)tPZHtwInputVCC/2VOLTAGE WAVEFORMSPULSE DURATIONVCCVCC/2VCC/20 VtPLZVCCVCC/2VOL + 0.15 VVOLtPHZVCC/2VOHVOH – 0.15 V0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESVCC/2VCC0 VTimingInputVCC/2NOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2 ns, tf ≤2 ns.D.The outputs are measured one at a time with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 2. Load Circuit and Voltage Waveforms6POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com SN54LVC86A, SN74LVC86AQUADRUPLE 2-INPUT EXCLUSIVE-OR GATES SCAS288I – JANUARY 1993 – REVISED OCTOBER 1998PARAMETER MEASUREMENT INFORMATIONVCC = 2.7 V AND 3.3 V ± 0.3 V6 VFrom OutputUnder TestCL = 50 pF(see Note A)500 ΩS1OpenGND500 ΩTESTtpdtPLZ/tPZLtPHZ/tPZHS1Open6 VGNDLOAD CIRCUITtw2.7 VTimingInputtsuDataInput1.5 V2.7 V1.5 V0 Vth2.7 V1.5 V0 VVOLTAGE WAVEFORMSSETUP AND HOLD TIMESInput1.5 V1.5 V0 VVOLTAGE WAVEFORMSPULSE DURATIONOutputControl(low-levelenabling)tPZLOutputWaveform 1S1 at 6 V(see Note B)tPZH2.7 V1.5 V1.5 V0 VtPLZ3 V1.5 VtPHZVOL + 0.3 VVOL2.7 VInputtPLH1.5 V1.5 V0 VtPHLVOHOutput1.5 VVOLTAGE WAVEFORMSPROPAGATION DELAY TIMES1.5 VVOLOutputWaveform 2S1 at GND(see Note B)1.5 VVOHVOH – 0.3 V0 VVOLTAGE WAVEFORMSENABLE AND DISABLE TIMESNOTES:A.CL includes probe and jig capacitance.B.Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.Waveform2 is for an output with internal conditions such that the output is high except when disabled by the output control.C.All input pulses are supplied by generators having the following characteristics: PRR ≤10 MHz, ZO = 50 Ω, tr ≤2.5 ns, tf ≤2.5 ns.D.The outputs are measured one at a time with one transition per measurement.E.tPLZ and tPHZ are the same as tdis.F.tPZL and tPZH are the same as ten.G.tPLH and tPHL are the same as tpd.Figure 3. Load Circuit and Voltage WaveformsPOST OFFICE BOX 655303 DALLAS, TEXAS 75265•7元器件交易网www.cecb2b.com

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