搜索
您的当前位置:首页正文

FA5310

来源:知库网
FA531X seriesFA531X series查询FA5310供应商Bipolar IC

For Switching Power Supply Control

sDimensions, mm󰀁SOP-8

85

FA5310BP(S), FA5314P(S), FA5316P(S)FA5311BP(S), FA5315P(S), FA5317P(S)

sDescription

The FA531X series are bipolar ICs for switching power supplycontrol that can drive a power MOSFET.

These ICs contain many functions in a small 8-pin package.With these ICs, a high-performance and compact powersupply can be created because not many external discretecomponents are needed.

16.0540.20 –0.05+0.1• Drive circuit for connecting a power MOSFET• Wide operating frequency range (5 to 600kHz)• Pulse-by-pulse overcurrent limiting function

• Overload cutoff function (Latch or non-protection mode selectable)

• Output ON/OFF control function by external signal• Overvoltage cutoff function in latch mode• Undervoltage malfunction prevention function• Low standby current (90µA typical)

• Exclusive choices by circuits (See selection guide on page 25)• 8-pin package (DIP/SOP)

°0~100.4±0.11.27±0.20.6󰀁DIP-8

85sApplications

• Switching power supply for general equipment

19.31.546.53.0min4.5max3.40 –0.0.37.6s Block diagram

󰀁FA5310BP(S)/FA5311BP(S)/FA5316P(S)/FA5317P(S)

2.54±0.250.5±0.10~15˚0~15˚PinNo.12345678

Pinsymbol

Description

Oscillator timing resistorFeedback

Overcurrent (+) detectionGroundOutputPower supply

Oscillator timing capacitorSoft-start and ON/OFF control

RTFBIS (+)GNDOUTVCCCTCS

󰀁FA5314P(S)/FA5315P(S)

PinNo.12345678

Pinsymbol

Description

Oscillator timing resistorFeedback

Overcurrent (–) detectionGroundOutputPower supply

Oscillator timing capacitorSoft-start and ON/OFF control

RTFBIS (–)GNDOUTVCCCTCS

1

2.0max+0.15sFeatures

8.2±0.35.3FA531X series

s Selection guide

TypeFA5310BP(S)FA5311BP(S)FA5314P(S)FA5315P(S)FA5316P(S)FA5317P(S)

Max. dutycycle (typ.)46%70%46%70%46%70%

UVLO (typ.)Polarity of overcurrent

detectionON thresholdOFF threshold++––++

16.0V16.0V15.5V15.5V15.5V15.5V

8.70V8.70V8.40V8.40V8.40V8.40V

Max. output

current1.5A1.5A1.5A1.5A1.0A1.0A

ApplicationForward typeFlyback typeForward typeFlyback typeForward typeFlyback type

s Absolute maximum ratings

Item

Supply voltageOutput currentFA5310/11/14/15FA5316/17Feedback terminal input voltageOvercurrent detectionterminal input voltageCS terminal input currentTotal power dissipation(Ta=25°C)

Operating temperatureJunction temperatureStorage temperature

Symbol

Rating31±1.5±1.04–0.3 to +42

800 (DIP-8) *1550 (SOP-8) *2–30 to +85125–40 to +150

UnitVAVVmAmW°C°C°C

s Recommended operating conditions

Item

Supply voltage

Oscillator timing resistanceFA5310/11

FA5314/15/16/17Soft-start capacitorOscillation frequency

Symbol

Min.103.310.15

Max.3010101600

UnitVkΩ

VCCIOVFBVISICSPdToprTjTstg

VCCRTCSfOSC

µFkHz

Notes:

*1 Derating factor Ta > 25°C : 8.0mW/°C (on PC board )*2 Derating factor Ta > 25°C : 5.5mW/°C (on PC board )

s Electrical characteristics (Ta=25°C, Vcc=18V, fOSC=135kHz)Oscillator section

Item

Oscillation frequency

Frequency variation 1 (due to supply voltage change)Frequency variation 1 (due to temperature change)

Symbol

Test condition

Min.125

Typ.135±1±1.5

Max.145

UnitkHz%%

fOSCfdVfdr

RT=5.1kΩ, CT=360pFVCC=10 to 30V

Ta=–30 to +85°C

Pulse width modulation circuit section

Item

Feedback terminal source currentInput threshold voltage (Pin 2)Maximum duty cycle

Symbol

Test condition

FA5310/14/16Min.

Typ.0.751.80

43

46

49

66

FA5311/15/17

Max.Min.

Typ.0.752.3070

74Max.

VV%Unit

IFB

VTH FBOVTH FBMDMAX

VFB=0

Duty cycle =0%Duty cycle =DMAX

–660–800–960–660–800–960µA

Soft-start circuit section

Item

Charge current (Pin 8)Input threshold voltage (Pin 8)

Symbol

Test conditionPin 8=0VDuty cycle =0%Duty cycle =DMAX

FA5310/14/16Min.

Typ.–100.901.90

–15

–5

FA5311/15/17

Max.Min.

–15

Typ.–100.902.30

Max.–5

µAVVUnit

ICHGVTH CSOVTH CSM

2

FA531X series

Overcurrent limiting circuit section

Item

Input threshold voltage (Pin 3)

Overcurrent detection terminal source currentDelay time

Symbol

Test condition

FA5310/11/16/17Min.

Typ.0.24150

0.21

Pin 3=0V

0.27

FA5314/15

Typ.

Max.

µAnsUnit

Max.Min.

VTH ISIIS

TPD IS

–0.21–0.17–0.14V

200

–300–200–100–240–160–80

Latch-mode cutoff circuit section

Item

CS terminal sink currentCutoff threshold voltage (Pin 8)

Symbol

Test conditionPin 8=6V, Pin 2=1V

Min.256.5

Typ.457.0

Max.657.5

UnitµAV

ISINK CSVTH CS

Overload cutoff circuit section

Item

Cutoff-start voltage (Pin 2)

Symbol

Test condition

Min.2.6

Typ.2.8

Max.3.1

UnitV

VTH FB

Undervoltage lockout circuit section

Item

OFF-to-ON threshold voltageON-to-OFF threshold voltage

Symbol

Test condition

FA5310/11Min.

Typ.16.08.70

15.58.20

16.59.20

FA5314/15/16/17

Max.Min.

14.87.70

Typ.15.58.40

Max.16.29.10

VVUnit

VCC ONVCC OFF

Output section

Item

L-level output VoltageH-level output VoltageRise timeFall time

Symbol

Test conditionFA5310/11/14/15FA5316/17

Min.

Typ.1.30

16.0

16.55050

Max.1.80

UnitVVnsns

VOLVOH

trtf

IO=100mAIO=–100mAVCC=18V

No loadNo load

IO=50mAIO=–50mAVCC=18V

No loadNo load

Output ON/OFF circuit section

Item

CS terminal source current

OFF-to-ON threshold Voltage (Pin 8)ON-to-OFF threshold Voltage (Pin 8)

Symbol

Test condition

Min.–15

Typ.–100.560.42

Max.–5

UnitµAVV

Isource csPin 8=0VVTH ONCS terminal voltage OFF→ONVTH OFFCS terminal voltage ON→OFF

Overall device

Item

Standby current

Operating-state supply currentOFF-state supply currentCutoff-state supply current

Symbol

Test condition

Min.

Typ.9091.11.1

Max.150151.81.8

UnitµAmAmAmA

ICC STICC OPICC OFFICCL

VCC=14V

3

sDescription of each circuit

1. Oscillator (See block diagram)

The oscillator generates a triangular waveform by charging anddischarging a capacitor. CT pin voltage oscillates

between an upper limit of approx. 3.0V and a lower limit ofapprox. 1.0V. The oscillation frequency is determined by aexternal resistance and capacitance shown in figure 1, andapproximately given by the following equation:

f (kHZ) =

106

4RT (kΩ) • CT (pF)

.........(1)

The recommended oscillation range is between 5k and600kHz.

The oscillator output is connected to a PWM comparator.2. Feedback pin circuit

Figure 2 gives an example of connection in which an

optocoupler is used to couple the feedback signal to the FB pin.It is designed to be strong against noise and will not createparasitic oscillation so much, because the output impedance atthe FB pin is as low as 4k to 5k. If this circuit causes powersupply instability, the frequency gain can be decreased byconnecting R4 and C4 as shown in figure 2. R4 should bebetween several tens of ohms to several kiloohms and C4should be between several thousand picofarads to onemicrofarads.

3. PWM comparator

The PWM comparator has four inputs as shown in Figure 3.Oscillator output x is compared with CS pin voltage 󰃁, FB pinvoltage 󰃂, and DT voltage {. The lowest of three inputs 󰃁, 󰃂,and { is compared with output x. If it is lower than the

oscillator output, the PWM comparator output is high, and if it ishigher than the oscillator output, the PWM comparatoroutput is low (see Fig. 4).

The IC output voltage is high during when the comparatoroutput is low, and the IC output voltage is low during when thecomparator output is high.

When the IC is powered up, CS pin voltage 󰃁 controls soft startoperation. The output pulse then begins to widen gradually.During normal operation, the output pulse width is determinedwithin the maximum duty cycle set by DT voltage { under thecondition set by feedback signal 󰃂, to stabilize the outputvoltage.

FA531X series

Fig. 1 Oscillator

Fig. 2 Configuration with optocoupler (FB pin input)

Fig. 3 PWM comparator

Fig. 4 PWM comparator timing chart

4

FA531X series

4. CS pin circuit

As shown in Figure 5 capacitor CS is connected to the CS pin.When power is turned on, the constant current source (10µA)begins to charge capacitor CS. Accordingly, the CS pin

voltage rises as shown in Figure 6. The CS pin is connected toan input of the PWM comparator. The device is in soft-startmode while the CS pin voltage is between 0.9V and 1.9V(FA5310/14/16) and between 0.9V and 2.3V(FA5311/15/17).During normal operation, the CS pin is clamped at 3.6V byinternal zener diode Zn. If the output voltage drops due to anoverload, etc., the clamp voltage shifts from 3.6V to 8.0V. As aresult, the CS pin voltage rises to 8.0V. The CS pin is alsoconnected to latch comparator C2. If the pin voltage risesabove 7.0V, the output of comparator C2 goes high to turn offthe bias circuit, thereby shutting the output down. ComparatorC2 can be used not only for shutdown in response to an

overload, but also for shutdown in response to an overvoltage.Comparator C1 is also connected to the CS pin, and the biascircuit is turned off and the output is shut down if the CS pinvoltage drops below 0.42V. In this way, comparator C1 canalso be used for output on/off control.

As explained above, the CS pin can be used for soft-startoperation, overload and overvoltage output shutdown andoutput on/off control.

Further details on the four functions of the CS pin are givenbelow.

4.1 Soft start function

Figure 7 shows the soft start circuit. Figure 8 is the soft-startoperation timing chart. The CS pin is connected to capacitorCS. When power is turned on, a 10µA constant-current sourcebegins to charge the capacitor. As shown in the timing chart,the CS pin voltage rises slowly in response to the chargingcurrent. The CS pin is connected internally to the PWMcomparator. The comparator output pulse slowly widens asshown in the timing chart.

The soft start period can be approximately evaluated by theperiod ts from the time the IC is activated to the time the outputpulse width widens to 30%. Period ts is given by the followingequation:

tS(mS)=160CS(µF)...................................(2)

5

Fig. 5 CS pin circuit

Fig. 6 CS pin waveform

Fig. 7 Soft-start circuit

Fig. 8 Soft-start timing chart

4.2 Overload shutdown

Figure 9 shows the overload shutdown circuit, and Figure 10 isa timing chart which illustrates overload shutdown operation.If the output voltage drops due to an overload or short-circuit,the output voltage of the FB pin rises. If FB pin voltageexceeds the reference voltage (2.8V) of comparator C3, theoutput of comparator C3 switches low to turn transistor Q off.In normal operation, transistor Q is on and the CS pin is

clamped at 3.6V by zener diode Zn. With Q off, the clamp isreleased and the 10µA constant-current source begins to

charge capacitor CS again and the CS pin voltage rises. Whenthe CS pin voltage exceeds the reference voltage (7.0V) ofcomparator C2, the output of comparator C2 switches high toturn the bias circuit off. The IC then enters the latched modeand shuts the output down. Shutdown current consumption is400µA(VCC=9V). This current must be supplied through thestartup resistor. The IC then discharges the MOSFET gates.Shutdown operation initiated by an overload can be reset bylowering supply voltage VCC below VCC OFF or forcing the CSpin voltage below 7.0V.

The period tOL from the time that the output is short-circuited tothe time that the bias circuit turns off is given by the followingequation:

tOL(mS)=340Cs(µF)...........................................(3)

4.3 Overvoltage shutdown

Figure 11 shows the overvoltage shutdown circuit, and Figure12 is a timing chart which illustrates overvoltage shutdownoperation.

The optocoupler PC1 is connected between the CS and VCCpins. If the output voltage rises too high, the PC1 turns on toraise the voltage at the CS pin via resistor R6. When the CSpin voltage exceeds the reference voltage (7.0V) of

comparator C2, comparator C2 switches high to turn the biascircuit off. The IC then enters the latched mode and shuts theoutput down. The shutdown current consumption of the IC is400µA(VCC=9V). This current must be applied via startupresistor R5.

The IC then discharges the MOSFET gates.

The shutdown operation initiated by an overvoltage conditioncan be reset by lowering supply voltage VCC below VCC OFF orforcing the CS pin voltage below 7.0V.

During normal operation, the CS pin is clamped by a 3.6Vzener diode with a sink current of 65µA max. Therefore, acurrent of 65µA or more must be supplied by the optocouplerin order to raise the CS pin voltage above 7.0V.

FA531X series

Fig. 9 Overload shutdown circuit

Fig. 10 Overload shutdown timing chart

Fig. 11 Overvoltage shutdown circuit

Fig. 12 Overvoltage shutdown timing chart

6

FA531X series

4.4 Output ON/OFF control

The IC can be turned on and off by an external signal appliedto the CS pin.

Figure 13 shows the external output on/off control circuit, andFigure 14 is the timing chart.

The IC is turned off if the CS pin voltage falls below 0.42V. Theoutput of comparator C1 switches high to turn the bias circuitoff. This shuts the output down. The IC then discharges theMOSFET gates.

The IC turns on if the CS pin is opened for automatic soft start.The power supply then restarts operation.

5. Overcurrent limiting circuit

The overcurrent limiting circuit detects the peak value of everydrain current pulse of the main switching MOSFET to limit theovercurrent.

The detection threshold is + 0.24V for FA5310B/11B/16/17with respect to ground as shown in Figure 15.

The drain current of the MOSFET is converted to voltage byresistor R7 and fed to the IS pin of the IC. If the voltage

exceeds the reference voltage (0.24V) of comparator C4, theoutput of comparator C4 goes high to set flip-flop output Qhigh. The output is immediately turned off to shut off thecurrent. Flip-flop output Q is reset on the next cycle by theoutput of the oscillator to turn the output on again. Thisoperation is repeated to limit the overcurrent.

If the overcurrent limiting circuit malfunctions due to noise,place an RC filter between the IS pin and the MOSFET.Figure 16 is a timing chart which illustrates current-limitingoperations.

Fig. 15 Overcurrent limiting circuit for FA5310/11/16/177

Fig. 13 External output on/off control circuit

Fig. 14 Timing chart for external output on/off control

Fig. 16 Overcurrent timing chart for FA5310/11/16/17

The detection threshold is -0.17V for FA5314/15 with respect toground as shown in Figure 17.

The operation is similar to that of FA5310B/11B/16/17 exceptthe threshold is minus voltage compared to that which is plusvoltage for FA5310B/11B/16/17.

Figure 18 is a timing chart which illustrates current limitingoperations.

6. Undervoltage lockout circuit

The IC incorporates a circuit which prevents the IC frommalfunctioning when the supply voltage drops. When thesupply voltage is raised from 0V, the IC starts operation withVCC=VCC ON.

If the supply voltage drops, the IC shuts its output down whenVCC=VCC OFF. When the undervoltage lockout circuit operates,the CS pin goes low to reset the IC.

7. Output circuit

As shown in Figure 19, the IC's totem-pole output can directlydrive the MOSFET. The OUT pin can source and sink currentsof up to 1.5A or 1.0A.

If IC operation stops when the undervoltage lockout circuitoperates, the gate voltage of the MOSFET goes low and theMOSFET is shut down.

FA531X series

Fig. 17 Overcurrent limiting circuit for FA5314/15

CS pin voltage (3.6V)DT voltageOscillator outputFB pin voltageOUT pin outputHLIS ( – ) pin voltageMinusdetectionComparator C4Referencevoltage (– 0.17V)Bias voltageOFFOvercurrent limitingFig. 18 Overcurrent timing chart for FA5314/15

Fig. 19 Output circuit

8

FA531X series

s Design advice

1. Startup circuit

It is necessary to start-up IC that the voltage inclination ofVCC terminal “dVcc/dt” satisfies the following equation(4).dVcc/dt(V/s)>1.8/Cs(µF)...............................(4)

Cs : Capacitor connected between CS terminal and GND

Note that equation (4) must be satisfied in any condition. Also,it is necessary to keep “latch mode” for overload protection orovervoltage protection that the current supplied to VCCterminal through startup resistor satisfies the followingequation(5).

Icc(Lat)> 0.4mA for Vcc Ϲ 9.2V ..................(5)

Icc(Lat) : Cutoff-state( = Latch mode ) supply current

The detail is explained as follows.

(1) Startup circuit connected to AC line directlyFig. 20 shows a typical startup circuit that a startup

resistor Rc is connected to AC line directly. The period frompower-on to startup is determined by Rc, RD and CA. Rc, RDand CA must be designed to satisfy the following equations.dVcc/dt(V/s)=

(1/CA) • {(VAVE–Vccon )/RC–Vccon/RD–Iccst} >1.8/(Cs(µF))................................................(6)

Rc(kΩ)< (VAVE–9.2(V))/{0.4 (mA) + (9.2(V)/RD(kΩ) } ...........(7)VAVE = Vac •ǰ2/π : Average voltage applied to AC line side of Rc

Vac:AC input effective voltage

Vccon:ON threshold of UVLO, 16.5V(max.) or 16.2V(max.)Iccst:Standby current, 0.15 mA(max.)

In this method, Vcc voltage includes ripple voltage influencedby AC voltage. Therefore, enough dVcc/dt required by

equation (6) tend to be achieved easily when Vcc reaches toVccon even if Vcc goes up very slowly. After power-off, Vccdoes not rise up because a voltage applied from bias windingto VCC terminal decreases and the current flowing RC be-comes zero, therefore, re-startup does not occur after Vcc fallsdown below OFF threshold of UVLO until next power-on.

9

Fig. 20 Startup circuit example(1)

(2) Startup circuit connected to rectified line

This method is not suitable for FA531X, especially concernedwith re-startup operation just after power-off or startup whichAC input voltage goes up slowly. Fig. 21 shows a startupcircuit that a startup resistor RA is connected to rectified linedirectly.

The period from power-on to startup is determined by RA, RBand CA. RA, RB and CA must be designed to satisfy thefollowing equations.

dVcc/dt(V/s)=

(1/CA)•{( VIN –Vccon )/RA– Vccon/RB–Iccst } >1.8/(Cs(µF))..........................................(8)

RA(kΩ) < ( VIN– 9.2(V) )/{ 0.4(mA) + ( 9.2(V)/RB(kΩ) ) }....(9)VIN : ǰ2 • (AC input effective voltage)After power-off, once VCC falls down below OFF thresholdvoltage, VCC rises up again and re-startup occurs while thecapacitor C1 is discharged until approximately zero becauseVCC voltage rises up by the current flowing RA.This operation is repeated several times.

After the repeated operation, IC stops in the condition that VCCvoltage is equal to Vccon (=ON threshold) because capacitorC1 is discharged gradually and the decreased VCC inclinationis out of the condition required by equation (4). After that, re-startup by power-on can not be guaranteed even whenequation (8) is satisfied.

The image of that the startup is impossible is shown in Fig. 22.It is necessary to startup IC that supply current Icc(startup) toVCC is over 4mA in the condition of Tj < 100°C during Vcc iskept at Vccon(Լ16V, balance state at Vccon after the repeatedoperation.

Icc(start-up) > 4mA

at Vcc=Vccon, Tj<100°C, after power-off

This balance state that startup is impossible tends to occur athigher temperature. If power-on is done when Vcc is not keptat Vccon (for example:power-off is done and after enough timethat C1 is discharged until Vcc can not be pulled up to Vccon),the IC can startup in the condition given by equation(8).In some cases, such as when the load current of power supplyis changed rapidly, you may want to prolong the hold time ofthe power supply output by means of maintaining Vcc over theoff threshold.

For this purpose, connect diode D4 and electrolytic capacitorC4 as shown in Fig. 23. This prolongs the hold time of thepower supply voltage Vcc regardless of the period from power-on to startup.

FA531X series

Fig. 21 Startup circuit example(2)

Startup is impossible (dVcc/dt <1.8/Cs just before Vcc reaches Vccon).Icc>4mA is necessary for startup at Tj <100°C and dVcc/dt=0.Power OFFPower ONVcconStartup is impossibleVccoffFig. 22 A image of waveform when re-startup is impossible

Fig. 23 Startup circuit example(3)

10

FA531X series

2.Disabling overload shutdown function

As shown in Figure 24, connect a 11kΩ resistor between theFB pin and ground. Then, the CS pin voltage does not risehigh enough to reach the reference voltage (7.0V) of the latchcomparator, and the IC does not enter the OFF latch mode.With this connection, the overvoltage shutdown function isavailable.

3.Setting soft start period and OFF latch delayindependently

Figure 25 shows a circuit for setting the soft start period andOFF latch delay independently. In this circuit, capacitance CSdetermines the soft start period, and capacitance CL

determines the OFF latch delay. If the overload shutdown andovervoltage shutdown functions raise the CS pin voltage toaround 5V, zener diode Zn becomes conductive to charge CL.The OFF latch delay can be thus prolonged by CL.

4. Laying out VCC and ground lines

Figure 26 and 27 show the recommended layouts of VCC andground lines. The bold lines represent paths carrying largecurrents. The lines must have an adequate thickness.5.Sink current setting for CS terminal

A sink current to CS terminal must be satisfied the followingcondition to prevent from the malfunction which uncontrolledpulse output generates at OUT terminal when latch-modeprotection should be operated for overvoltage.65µA < Ics(sink) < 500µA at Vcs= 6.5(V)

Ics(sink) : Sink current to CS terminal

Example (for the circuit shown in Fig. 28 )Ics(sink) = (28(V)–18(V)– 6.5(V) )/7.5(kΩ) Լ 467 (µA) < 500 (µA)

Fig. 24 Disabling overload shutdown function

11

Fig. 25 Independent setting of soft-start period

and OFF latch delay

Fig. 26 Vcc line and ground line (1) for FA5310B/11B/16/17

Fig. 27 Vcc line and ground line (2) for FA5314/15

7.5kΩ18V Zener diodeCSUnder 500µAVCCFig. 28 Setting sink current for CS terminal

FA531X series

sCharacteristic curves (Ta=25°C)

Oscillation frequency (fOSC) vs.Oscillation frequency (fOSC) vs. ambient temperature (Ta)

timing capacitor capacitance (CT)

Output duty cycle vs. FB terminal voltage (VFB)

Output duty cycle vs. CS terminal voltage (VCS)

Output duty cycle vs. FB terminal source current(ISOURCE)

CS terminal sink current (ISINK CS) vs.CS terminal voltage (VCS)

12

FA531X series

H-level output voltage (VOH) vs. output source current (ISOURCE)FA5310/11/14/15

L-level output voltage(VOL) vs. output sink current (ISINK)FA5310/11/14/15

IS (+) terminal threshold voltage (VTH IS(+)) vs.ambient temperature (Ta)FA5310/11/16/17 13

FA5316/17

5

VCC=18V4

]V[3

HOV–CCV2

1

010–22510–1251002ISOURCE [A]

FA5316/17

5VCC=18V43]V[ LOV21010–22510–1251002ISINK [A]IS (–) terminal threshold voltage (VTH IS(–)) vs.ambient temperature (Ta)FA5314/15–190–180]Vm–170[ )–(SIHTV–160–150–140–250255075100Ta [˚C]FA531X series

IS (+) terminal current (IIS(+)) vs.IS (+) terminal voltage (VIS(+))FA5310/11/16/17

600500400300

]Aµ200[ )+(SI100I0

–100–200–300

0

0.1

0.2

0.3

0.4

0.5

0.6

VIS(+) [V]Supply current (ICC) vs. supply voltage (VCC)Ordinary operationFA5310/11

1110fosc=600kHz9fosc=135kHz87]A6m[ C5CI0.20.1051015202530VCC [V]

Supply current (ICC) vs. supply voltage (VCC)OFF or OFF latch modeFA5310/11

2.01.81.61.4

]1.2Am[ 1.0CCI0.80.60.40.2

0

5

10

15

20

25

30

VCC [V]

IS (-) terminal current (IIS(-)) vs.IS (-) terminal voltage (IIS(-))FA5314/15

–200–180–160–140

]A–120µ[ )––100(SII–80–60–40–20

0–0.1–0.2–0.3–0.4–0.5

VIS(–) [V]

FA5314/15/16/17

1110fosc=600kHz9fosc=135kHz87]A6m[ C5CI0.20.1051015202530VCC [V]

FA5314/15/16/17

2.01.81.61.4

]1.2Am[ 1.0CCI0.80.60.40.2

0

5

10

15

20

25

30

VCC [V]

14

FA531X series

sApplication circuit

󰀁Example of FA5310B application circuit

󰀁Example of FA5311B application circuit

15

FA531X series

󰀁Example of FA5314 application circuit

󰀁Example of FA5315 application circuit

16

FA531X series

󰀁Example of FA5316 application circuit

󰀁Example of FA5317 application circuit

Parts tolerances characteristics are not defined in the circuit designsample shown above. When designing an actual circuit for aproduct, you must determine parts tolerances and characteristics forsafe and economical operation.17

因篇幅问题不能全部显示,请点此查看更多更全内容

Top