TPS2220B
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SLVS554–JANUARY2005
POWER-INTERFACESWITCHESFORSERIALPCMCIACONTROLLERS
FEATURES
•••••••••••
Single-SlotSwitch:TPS2220B
FastCurrentLimitResponseTime
FullyIntegratedVCCandVPPSwitchingfor3.3V,5V,and12V
MeetsCurrentPCCard™Standards
VppOutputSelectionIndependentofVCC12-Vand5-VSuppliesCanBeDisabledTTL-LogicCompatibleInputs
Short-CircuitandThermalProtection24-PinHTSSOPand24-PinSSOP
140-µA(Typical)QuiescentCurrentfrom3.3-VInput
Break-Before-MakeSwitching
••
Power-OnReset
-40°Cto85°COperatingAmbientTemperatureRange
APPLICATIONS
•••••
NotebookandDesktopComputersBarCodeScannersDigitalCamerasSet-TopBoxesPDAs
DESCRIPTION
TheTPS2220Bpower-interfaceswitchprovidesanintegratedpower-managementsolutionforsingleCardsockets.Thedeviceallowsthecontrolleddistributionof3.3V,5V,and12Vtoonecardslot.Thecurrent-limitingandthermal-protectionfeatureseliminatetheneedforfuses.Current-limitreportinghelpstheuserisolateasystemfault.TheswitchrDS(on)andcurrent-limitvalueshavebeensetforthepeakandaveragecurrentrequirementsstatedinthePCCardspecification,andoptimizedforcost.
LiketheTPS2220AthisdevicesupportsindependentVPP/VCCswitching.TheTPS2220BispincompatiblewiththeTPA2220Aexeceptforpin20oftheTPS2220Bwhichhasnoconnection.
AVAILABLEOPTIONS
PACKAGEDDEVICE
TA
-40°Cto85°C
(1)
PLASTICSMALLOUTLINE
(DB-24)(1)
TPS2220BDB
PowerPAD™
PLASTICSMALLOUTLINE
(PWP-24)(1)
TPS2220BPWP
TheDBandPWPpackagesarealsoavailabletapedandreeled.AddRsuffixtodevicetype(e.g.,TPS2220BPWPR)fortapedandreeled.
Pleasebeawarethatanimportantnoticeconcerningavailability,standardwarranty,anduseincriticalapplicationsofTexasInstrumentssemiconductorproductsanddisclaimerstheretoappearsattheendofthisdatasheet.
PowerPADisatrademarkofTexasInstruments.
PCCardisatrademarkofPCMCIA(PersonalComputerMemoryCardInternationalAssociation).
PRODUCTIONDATAinformationiscurrentasofpublicationdate.ProductsconformtospecificationsperthetermsoftheTexasInstrumentsstandardwarranty.Productionprocessingdoesnotnecessarilyincludetestingofallparameters.
Copyright©2005,TexasInstrumentsIncorporated
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Thesedeviceshavelimitedbuilt-inESDprotection.TheleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduringstorageorhandlingtopreventelectrostaticdamagetotheMOSgates.
ORDERINGINFORMATION
TA
–40°Cto85°C(1)
SSOP(DB)(1)TPS2220BDB
STATUSActive
HTSSOP(PWP)(1)TPS2220BPWP
STATUSActive
Forthemostcurrentpackageandorderinginformation,seethePackageOptionAddendumattheendofthisdocument,orseetheTIwebsiteatwww.ti.com.ABSOLUTEMAXIMUMRATINGS
overoperatingfree-airtemperaturerange(unlessotherwisenoted)(1)
TPA2220B
VI(3.3V)
VI
InputvoltagerangeforcardpowerLogicinput/outputvoltage
VO
Outputvoltage
Continuoustotalpowerdissipation
IOTJTstg
Outputcurrent
OperatingvirtualjunctiontemperaturerangeStoragetemperaturerange
Leadtemperature1,6mm(1/16inch)fromcasefor10seconds)OCsinkcurrent
(1)
IO(AVCC)IO(AVPP)VO(AVCC)VO(AVPP)VI(5V)VI(12V)
–0.3Vto5.5V–0.3Vto5.5V–0.3Vto14V–0.3Vto6V–0.3Vto6V–0.3Vto14V
SeeDissipationRatingTable
InternallyLimitedInternallyLimited–40°Cto100°C–55°Cto150°C
260°C10mA
Stressesbeyondthoselistedunder\"absolutemaximumratings\"maycausepermanentdamagetothedevice.Thesearestressratingsonly,andfunctionaloperationofthedeviceattheseoranyotherconditionsbeyondthoseindicatedunder\"recommendedoperatingconditions\"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmayaffectdevicereliability.
DISSIPATIONRATINGTABLE
PACKAGE(1)DBPWP(1)
2424
TA≤25°CPOWERRATING
890mW3322mW
DERATINGFACTORABOVETA=25°C
8.9mW/°C33.22mW/°C
TA=70°CPOWERRATING
489mW1827mW
TA=85°CPOWERRATING
356mW1329mW
ThesedevicesaremountedonaaJEDEClow-kboard(2-oz.tracesonsurface).
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RECOMMENDEDOPERATINGCONDITIONS
MINInputvoltage,VI(3.3V)isrequiredforallcircuitoperations.5Vand12Vareonlyrequiredfortheirrespectivefunctions.IOf(clock)OutputcurrentClockfrequencyDatatwPulsedurationLatchClockResetthtsuData-to-clockholdtime(seeFigure2)Data-to-clocksetuptime(seeFigure2)200250100100100100100250–40100nsnsnsns°CnsVI(3.3V)(1)VI(5V)VI(12V)IO(AVCC)atTJ=100°CIO(AVPP)atTJ=100°C337MAX3.65.513.511002.5AmAMHzVUNITtd(latch)Latchdelaytime(seeFigure2)td(clock)Clockdelaytime(seeFigure2)TJ(1)
Operatingvirtualjunctiontemperature(maximumtobecalculatedatworstcasePDat85°Cambient)ItisunderstoodthatforVI(3.3V)<3V,voltageswithintheabsolutemaximumratingsappliedtopin5Vorpin12VdonotdamagetheIC.
ELECTRICALCHARACTERISTICS
TJ=25°C,VI(5V)=5V,VI(3.3V)=3.3V,VI(12V)=12V,alloutputsunloaded(unlessotherwisenoted)
PARAMETER
POWERSWITCH
3.3VtoAVCC5VtoAVCC
rDS(on)
Staticdrain-sourceon-stateresistance
3.3Vor5VtoAVPP12VtoAVPP
Outputdischargeresistance
DischargeatAVCCDischargeatAVPP
IO=750mAeach
IO=750mAeach,TJ=100°CIO=500mAeach
IO=500mAeach,TJ=100°CIO=50mAeach
IO=50mAeach,TJ=100°CIO=50mAeach
IO=50mAeach,TJ=100°CIO(disc)=1mAIO(disc)=1mA
Limit(steady-statevalue),outputpoweredintoashortcircuit
IOS
Short-circuitoutputcurrent
Limit(steady-statevalue),outputpoweredintoashortcircuit,TJ=100°CRisingtemperature
5VtoAVCC=5V,with100-mΩshorttoGND5VtoAVPP=5V,with100-mΩshorttoGND
II(3.3V)II(5V)II(12V)II(3.3V)
Shutdownmode
II(5V)II(12V)
VO(AVCC)=VO(AVPP)=Hi-ZVO(AVCC)=VO(AVPP)=3.3VandalsoforRESET=0V
IOS(AVCC)IOS(AVPP)IOS(AVCC)IOS(AVPP)
0.50.211201120
85110951200.8122.50.70.41.42001.42001351010314081000.30.10.3
20012180222
µA
11014013016011.32.53.410.523002300
kΩAmAAmA°CµsΩmΩ
TESTCONDITIONS(1)
MIN
TYP
MAX
UNIT
TJ
Thermalshutdowntemperature
ThermaltrippointHysteresis
Current-limitresponsetime(2)(3)
Normaloperation
II
Inputcurrent,quiesc-ent
(1)(2)(3)Pulse-testingtechniquesmaintainjunctiontemperatureclosetoambienttemperature;thermaleffectsmustbetakenintoaccountseparately.
Specifiedbydesign;nottestedinproduction.
Fromapplicationofshortto110%offinalcurrentlimit.
3
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ELECTRICALCHARACTERISTICS(continued)
TJ=25°C,VI(5V)=5V,VI(3.3V)=3.3V,VI(12V)=12V,alloutputsunloaded(unlessotherwisenoted)
PARAMETER
TESTCONDITIONS(1)
VO(AVCC)=5V,VI(5V)=VI(12V)=0V
Shutdownmode
VO(AVPP)=12V,VI(5V)=VI(12V)=0V
LOGICSECTION(CLOCK,DATA,LATCH,RESET,SHDN,OC)II(/RESET)
(4)
MIN
TJ=100°CTJ=100°C
–1–30–1–50–1–12
TYPMAX105010501
UNIT
Ilkg
Leakagecurrent,outputoffstate
µA
RESET=5.5VRESET=0VSHDN=5.5VSHDN=0VLATCH=5.5VLATCH=0V0Vto5.5V
–20–101-35011
V
0.8
VVµAVmV
2.8
VmVµs
1.7
VµA
IIInputcurrent,logic
II(/SHDN)(4)II(LATCH)(4)II(CLOCK,
DATA)
VIHVILVO(sat)IlkgVI(3.3V)Vhys(3.3V)VI(5V)Vhys(5V)tdfVI(POR)
High-levelinputvoltage,logicLow-levelinputvoltage,logicOutputsaturationvoltageatOCLeakagecurrentatOCInputvoltageat3.3Vpin,UVLOUVLOhysteresisvoltageatVA(5)Inputvoltageat5Vpin,UVLOUVLOhysteresisvoltageat5V(5)
Delaytimeforfallingresponse,UVLO(5)Inputvoltage,power-onreset(5)
3.3-VvoltagebelowwhichPORisassertedcausingaRESETinternallywithalllineswitchesopenandalldischargeswitchesclosed.
5-Vlevelbelowwhichonly5VswitchesareHi-ZDelayfromvoltagehit(stepfrom3Vto2.3V)toHi-Zcontrol(90%VGtoGND)IO=2mAVO(/OC)=5.5V
3.3-VlevelbelowwhichallswitchesareHi-Z
0.140
2.42.3
2.71002.51004
0.412.9
UVLOANDPOR(POWER-ONRESET)
(4)(5)LATCHhaslow-currentpulldown.RESETandSHDNhavelow-currentpullup.Specifiedbydesign;nottestedinproduction.
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SWITCHINGCHARACTERISTICS
VCC=5V,TA=25°C,VI(3.3V)=3.3V,VI(5V)=5V,VI(12)=12V,alloutputsunloaded(unlessotherwisenoted)
PARAMETER(1)
LOADCONDITION
CL(AVCC)=0.1µF,CL(AVPP)=0.1µF,IO(AVCC)=0A,IO(AVPP)=0ACL(AVCC)=150µF,CL(AVPP)=10µF,IO(AVCC)=0.75A,IO(AVPP)=50mACL(AVCC)=0.1µF,CL(AVPP)=0.1µF,IO(AVCC)=0A,IO(AVPP)=0ACL(AVCC)=150µF,CL(AVPP)=10µF,IO(AVCC)=0.75A,IO(AVPP)=50mA
TESTCONDITIONS(2)
VO(AVCC)=5VVO(AVPP)=12VVO(AVCC)=5VVO(AVPP)=12VVO(AVCC)=5V,
DischargeswitchesONVO(AVPP)=12V,
DischargeswitchesONVO(AVCC)=5VVO(AVPP)=12VLatch↑toAVPP(12V)Latch↑toAVPP(5V)
CL(AVCC)=0.1µF,CL(AVPP)=0.1µF,IO(AVCC)=0A,IO(AVPP)=0A
Latch↑toAVPP(3.3V)Latch↑toAVCC(5V)Latch↑toAVCC(3.3V)
tpd
Propagationdelaytimes(3)
Latch↑toAVPP(12V)Latch↑toAVPP(5V)
CL(AVCC)=150µF,CL(AVPP)=10µF,IO(AVCC)=0.75A,IO(AVPP)=50mA
Latch↑toAVPP(3.3V)Latch↑toAVCC(5V)Latch↑toAVCC(3.3V)
tpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdofftpdontpdoff
MIN
TYPMAX0.90.261.10.60.50.22.353.920.620.770.510.750.520.32.50.32.82.20.80.80.60.80.60.62.50.52.6
msmsmsmsUNIT
tr
Outputrisetimes(3)
tf
Outputfalltimes
(3)
(1)(2)(3)RefertoParameterMeasurementInformationinFigure1.Nocardinserted,assumesa0.1-µFoutputcapacitor(seeFigure1).Specifiedbydesign;nottestedinproduction.
5
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FUNCTIONALBLOCKDIAGRAM
S23.3 VSee Note ACSS1S35 VS4S55 V12 V
S6S7See Note ACSAVPPAVCCAVCC
Control LogicSHDNRESETDATACLOCKLATCHGNDThermal LimitCurrent LimitUVLOOCPORNOTES:A.Current sense
PINASSIGNMENTS
TPS2220B
DB OR PWP PACKAGE
(TOP VIEW)5V5VDATACLOCKLATCH
NC12VAVPPAVCCAVCCGNDRESET1234 56789101112242322212019181716151413NCNCNCSHDNNCNCNCNCNCOCNC3.3V
NC − No internal connection
6
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PINASSIGNMENTS(continued)
TerminalFunctions
TERMINALNAME3.3V5V12VAVCCAVPPGNDOCSHDNRESETCLOCKDATALATCHNC
NO.TPS2220B
131,279,108111521124356,14,16,17,18,19,20,22,23,
24
OIIIIIIIIOO
3.3-Vinputforcardpowerandchippower5-Vinputforcardpower
12-Vinputforcardpower(AVPP).
Switchedoutputthatdelivers3.3V,5V,groundorhighimpedancetocardSwitchedoutputthatdelivers3.3V,5V,12V,groundorhighimpedancetocardGround
Open-drainovercurrentreportingoutputthatgoeslowwhenanovercurrentconditionexists.Anexternalpullupisrequired.
Hi-Z(open)allswitches.IdenticalfunctiontoserialD8.Asynchronousactive-lowcommand,internalpullup
Logic-levelRESETinputactivelow.Asynchronousactive-lowcommand,internalpullupLogic-levelclockforserialdatawordLogic-levelserialdataword
Logic-levellatchforserialdataword,internalpulldownNointernalconnectionI/O
DESCRIPTION
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PARAMETERMEASUREMENTINFORMATION
AVPPIO(AVPP)
AVCCIO(AVCC)
LOAD CIRCUIT (AVPP)LOAD CIRCUIT (AVCC)
LATCH50%tpd(off)VDDGNDLATCH50%tpd(off)VDDGND
tpd(on)VO(AVPP)VI(12V/5V/3.3V)
90%10%GNDtpd(on)VO(AVCC)VI(5V/3.3V)
90%10%GND
Propagation Delay (AVPP)
tfVI(12V/5V/3.3V)
90%10%Rise/Fall Time (AVPP)
GND
Propagation Delay (AVCC)
tfVI(5V/3.3V)
90%10%Rise/Fall Time (AVCC)
GND
trVO(AVPP)trVO(AVCC)LATCH50%toff90%10%Turnon/off Time (AVPP)
VDDGND
LATCH50%toffVDDGND
tonVO(AVPP)tonVI(12V/5V/3.3V)GND
VO(AVCC)VI(5V/3.3V)
90%10%Turnon/off Time (AVCC)
GND
VOLTAGE WAVEFORMS
Figure1.TestCircuitsandVoltageWaveforms
DATAD10D9D8D7D6D5D4D3D2D1D0Data Setup TimeLATCHData Hold TimeLatch Delay TimeClock Delay TimeCLOCKNOTE:Dataisclockedinonthepositiveedgeoftheclock.Thepositiveedgeofthelatchsignalshouldoccurbeforethenext
positiveedgeoftheclock.FordefinitionofD0toD10,seethecontrollogictable.
Figure2.Serial-InterfaceTimingforTPS2220B
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TableofGraphs
FIGURE
Short-circuitresponse,shortappliedtopowered-on5-VAVCC-switchoutputShort-circuitresponse,shortappliedtopowered-on12-VAVPP-switchoutputOCresponsewithrampedovercurrent-limitloadon5-VAVCC-switchoutputOCresponsewithrampedovercurrent-limitloadon12-VAVPP-switchoutputAVCCTurnonpropagationdelaytime(CL=150µF)AVCCTurnoffpropagationdelaytime(CL=150µF)AVPPTurnonpropagationdelaytime(CL=10µF)AVPPTurnoffpropagationdelaytime(CL=10µF)AVCCTurnonpropagationdelaytime(TJ=25°C)AVCCTurnoffpropagationdelaytime(TJ=25°C)AVPPTurnonpropagationdelaytime(TJ=25°C)AVPPTurnoffpropagationdelaytime(TJ=25°C)AVCCRisetime(CL=150µF)AVCCFalltime(CL=150µF)AVPPRisetime(CL=10µF)AVPPFalltime(CL=10µF)AVCCRisetime(TJ=25°C)AVCCFalltime(TJ=25°C)AVPPRisetime(TJ=25°C)AVPPFalltime(TJ=25°C)
vsTimevsTimevsTimevsTime
vsJunctiontemperaturevsJunctiontemperaturevsJunctiontemperaturevsJunctiontemperaturevsLoadcapacitancevsLoadcapacitancevsLoadcapacitancevsLoadcapacitancevsJunctiontemperaturevsJunctiontemperaturevsJunctiontemperaturevsJunctiontemperaturevsLoadcapacitancevsLoadcapacitancevsLoadcapacitancevsLoadcapacitance
345678910111213141516171819202122
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SHORT-CIRCIUTRESPONSE,
SHORTAPPLIEDTOPOWERED-ON5-V
AVCC-SWITCHOUTPUTSHORT-CIRCIUTRESPONSE,
SHORTAPPLIEDTOPOWERED-ON12-V
AVPP-SWITCHOUTPUT
VO(/OC)5 V/divVIN(5V)2 V/div
VO(/OC)2 V/div
IO(VCC)5 A/div
0
100
200
300
400
500
IO(xVPP)2 A/div
0
1
2
3
4
5
t − Time − µst − Time − ms
Figure3.
OCRESPONSEWITHRAMPEDOVERCURRENT-LIMITLOADON5-V
AVCC-SWITCHOUTPUT
Figure4.
OCRESPONSEWITHRAMPEDOVERCURRENT-LIMITLOADON12-V
AVPP-SWITCHOUTPUT
VO(/OC)5 V/divVO(/OC)5 V/div
IO(xVCC)1 A/div
0
10
20
30
40
50
IO(xVPP)100 mA/div
0
2
4
6
8
10
t − Time − mst − Time − ms
Figure5.Figure6.
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TURNONPROPAGATIONDELAYTIME,AVCC
vs
JUNCTIONTEMPERATURE
AVCC = 5 VIO = 0.75 ACL = 150 µFtpd(off)− Turnoff Propagation Delay Time, AVCC − mstpd(on)− Turnon Propagation Delay Time, AVCC − ms0.80.70.60.50.40.30.20.10−50
2.6TURNOFFPROPAGATIONDELAYTIME,AVCC
vs
JUNCTIONTEMPERATURE
2.552.52.452.42.352.32.25−50AVCC = 5 VIO = 0.75 ACL = 150 µF−20104070TJ − Junction Temperature − °C
100
−20104070TJ − Junction Temperature − °C
100Figure7.
TURNONPROPAGATIONDELAYTIME,AVPP
vs
JUNCTIONTEMPERATURE
tpd(on)− Turnon Propagation Delay Time, AVPP − msAVPP = 12 VIO = 0.05 ACL = 10 µFtpd(off)− Turnoff Propagation Delay Time, AVCC − ms30.90.80.70.60.50.40.30.20.10−50Figure8.
TURNONPROPAGATIONDELAYTIME,AVPP
vs
JUNCTIONTEMPERATURE
2.521.510.5AVCC = 12 VIO = 0.05 ACL = 10 µF0−50−20104070TJ − Junction Temperature − °C
100−20104070TJ − Junction Temperature − °C
100Figure9.Figure10.
11
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TURNONPROPAGATIONDELAYTIME,AVCC
vs
LOADCAPACITANCE
tpd(on)− Turnon Propagation Delay Time, AVCC − mstpd(off)− Turnoff Propagation Delay Time, AVCC − ms0.70.60.50.40.30.20.10
AVCC = 5 VIO = 0.75 ATJ = 25°C2.55TURNONPROPAGATIONDELAYTIME,AVCC
vs
LOADCAPACITANCE
AVCC = 5 VIO = 0.75 ATJ = 25°C2.52.452.42.352.30.1110100CL − Load Capacitance − µF
10002.250.1110100CL − Load Capacitance − µF
1000Figure11.
TURNONPROPAGATIONDELAYTIME,AVPP
vs
LOADCAPACITANCE
tpd(off)− Turnoff Propagation Delay Time, AVPP − mstpd(on)− Turnon Propagation Delay Time, AVPP − ms2.25AVPP = 12 VIO = 0.05 ATJ = 25°C0.90.80.70.60.50.40.30.20.100.1
AVPP = 12 VIO = 0.05 ATJ = 25°CFigure12.
TURNONPROPAGATIONDELAYTIME,AVPP
vs
LOADCAPACITANCE
2.22.152.12.0521.950.11CL − Load Capacitance − µF
101
CL − Load Capacitance − µF
10
Figure13.Figure14.
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RISETIME,AVCC
vs
JUNCTIONTEMPERATURE
1.221.2tr− Rise Time, AVCC − ms1.181.161.141.121.11.081.061.04−50−20104070TJ − Junction Temperature − °C
1002.352.34−50AVCC = 5 VIO = 0.75 ACL = 150 µF2.412.4tf− Fall Time AVCC − ms2.392.382.372.36FALLTIME,AVCC
vs
JUNCTIONTEMPERATURE
AVCC = 5 VIO = 0.75 ACL = 150 µF−20104070TJ − Junction Temperature − °C
100Figure15.
RISETIME,AVPP
vs
JUNCTIONTEMPERATURE
0.605AVPP = 12 VIO = 0.05 ACL = 10 µFtf− Fall Time, AVPP − ms4.15AVPP = 12 VIO = 0.05 ACL = 10 µFFigure16.
FALLTIME,AVPP
vs
JUNCTIONTEMPERATURE
0.6tr− Rise Time AVPP − ms4.10.5954.050.5940.5853.950.583.93.85−500.575−50−20104070TJ − Junction Temperature − °C
100−20104070TJ − Junction Temperature − °C
100Figure17.Figure18.
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RISETIME,AVCC
vs
LOADCAPACITANCE
1.22.5FALLTIME,AVCC
vs
LOADCAPACITANCE
AVCC = 5 VIO = 0.75 ATJ = 25°Ctr− Rise Time, AVCC − ms0.8tf− Fall Time AVCC − msAVCC = 5 VIO = 0.75 ATJ = 25°C110100CL − Load Capacitance − µF
1000121.50.610.40.20.500.100.1110100CL − Load Capacitance − µF
1000Figure19.
RISETIME,AVPP
vs
LOADCAPACITANCE
0.70.6tr− Rise Time, AVPP − ms0.5AVPP = 12 VIO = 0.05 ATJ = 25°Ctf− Fall Time, AVPP − ms4.543.532.521.510.100.10.500.1Figure20.
FALLTIME,AVPP
vs
LOADCAPACITANCE
AVPP = 12 VIO = 0.05 ATJ = 25°C0.40.30.21CL − Load Capacitance − µF
101CL − Load Capacitance − µF
10Figure21.Figure22.
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TYPICALCHARACTERISTICS
TableofGraphs
FIGURE
Inputcurrent,AVCC=3.3V
II
Inputcurrent,AVCC=5VInputcurrent,AVPP=12V
Staticdrain-sourceon-stateresistance,3.3VtoAVCCswitch
rDS(on)
Staticdrain-sourceon-stateresistance,5VtoAVCCswitchStaticdrain-sourceon-stateresistance,12VtoAVPPswitchAVCCswitchvoltagedrop,3.3-Vinput
VO
AVCCswitchvoltagedrop,5-VinputAVPPswitchvoltagedrop,12-VinputShort-circuitcurrentlimit,3.3VtoAVCC
IOS
Short-circuitcurrentlimit,5VtoAVCCShort-circuitcurrentlimit,12VtoAVPP
vsJunctiontemperaturevsLoadcurrentvsJunctiontemperaturevsJunctiontemperature
232425262728293031323334
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INPUTCURRENT,AVCC=3.3V
vs
JUNCTIONTEMPERATURE
180
µA160II− Input Current, AVCC = 3.3 V −µA140120100806040200−50
−20104070TJ − Junction Temperature − °C
100
14121086420−50
INPUTCURRENT,AVCC=5V
vs
JUNCTIONTEMPERATURE
II− Input Current, AVCC = 5 V −−20104070TJ − Junction Temperature − °C
100
Figure23.Figure24.
STATICDRAIN-SOURCEON-STATERESISTANCE,
3.3VTOAVCCSWITCH
vs
JUNCTIONTEMPERATURE
rDS(on)− Static Drain-Source On-State Resistance,3.3 V to AVCC Switch −Ω 0.12
INPUTCURRENT,AVPP=12V
vs
JUNCTIONTEMPERATURE
120
II− Input Current, AVPP = 12 V −µA100
0.1
80
0.08
60
0.06
40
0.04
20
0.02
0−50
−20104070TJ − Junction Temperature − °C
100
0−50
−20104070TJ − Junction Temperature − °C
100
Figure25.Figure26.
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STATICDRAIN-SOURCEON-STATERESISTANCE,
5VTOAVCCSWITCH
vs
JUNCTIONTEMPERATURE
rDS(on)− Static Drain-Source On-State Resistance,5 V to AVCC Switch −ΩrDS(on)− Static Drain-Source On-State Resistance,12 V to AVPP Switch −Ω−20104070TJ − Junction Temperature − °C
100
0.140.120.10.080.060.040.020−50
STATICDRAIN-SOURCEON-STATERESISTANCE,
12VTOAVPPSWITCH
vs
JUNCTIONTEMPERATURE
3
2.5
2
1.5
1
0.5
0−50
−20104070TJ − Junction Temperature − °C
100
Figure27.
AVCCSWITCHVOLTAGEDROP,3.3-VINPUT
vs
LOADCURRENT
0.12VO− AVCC Switch Voltage Drop, 3.3-V Input − VVO− AVCC Switch Voltage Drop, 5-V Input − V0.140.120.1Figure28.
AVCCSWITCHVOLTAGEDROP,5-VINPUT
vs
LOADCURRENT
0.1TJ = 100°CTJ = 0°CTJ = 25°CTJ = 100°CTJ = 0°C0.080.08TJ = 25°C0.060.040.020TJ = 85°CTJ = −40°C0.06TJ = −40°CTJ = 85°C0.020.04000.20.40.6IL − Load Current − A
0.8100.20.40.6IL − Load Current − A
0.81Figure29.Figure30.
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AVPPSWITCHVOLTAGEDROP,12-VINPUT
vs
LOADCURRENT
0.14IOS− Short-Circuit Current Limit, 3.3 V to AVCC − AVO− AVPP Switch Voltage Drop, 12-V Input − V0.120.10.080.060.040.020TJ = 100°CTJ = 0°CTJ = 25°C1.395
SHORT-CIRCUITCURRENTLIMIT,3.3VTOAVCC
vs
JUNCTIONTEMPERATURE
1.391.3851.381.3751.371.3651.361.355
−50
TJ = −40°CTJ = 85°C00.010.020.03IL − Load Current − A
0.040.05−20104070TJ − Junction Temperature − °C
100
Figure31.
SHORT-CIRCUITCURRENTLIMIT,5VTOAVCC
vs
JUNCTIONTEMPERATURE
IOS− Short-Circuit Current Limit, 12 V to AVPP − A1.435IOS− Short-Circuit Current Limit, 5 V to AVCC − A1.431.4251.421.4151.411.4051.41.3951.391.385
−50
−20104070TJ − Junction Temperature − °C
100
Figure32.
SHORT-CIRCUITCURRENTLIMIT,12VTOAVPP
vs
JUNCTIONTEMPERATURE
0.2080.2060.2040.202AVPP = 12 V0.20.1980.1960.1940.1920.19−50−20104070TJ − Junction Temperature − °C
100Figure33.Figure34.
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APPLICATIONINFORMATION
OVERVIEW
PCCardswereinitiallyintroducedasameanstoaddflashmemorytoportablecomputers.Theideaofadd-incardsquicklytookhold,andmodems,wirelessLANs,globalpositioningsatellitesystem(GPS),multimedia,andhard-diskversionsweresoonavailable.AsthenumberofPCCardapplicationsgrew,theengineeringcommunityquicklyrecognizedtheneedforastandardtoensurecompatibilityacrossplatforms.Therefore,thePCMCIA(PersonalComputerMemoryCardInternationalAssociation)wasestablished,comprisingmembersfromleadingcomputer,software,PCCard,andsemiconductormanufacturers.Onekeygoalwastorealizetheplug-and-playconcept,sothatcardsandhostsfromdifferentvendorswouldbetransparentlycompatible.
PCCARDPOWERSPECIFICATION
Systemcompatibilityalsomeanspowercompatibility.Themostcurrentsetofspecifications(PCCardStandard)setforthbythePCMCIAcommitteestatesthatpoweristobetransferredbetweenthehostandthecardthrougheightofthe68terminalsofthePCCardconnector.ThispowerinterfaceconsistsoftwoVCC,twoVpp,andfourgroundterminals.MultipleVCCandgroundterminalsminimizeconnector-terminalandlineresistance.ThetwoVppterminalswereoriginallyspecifiedasseparatesignals,butarenormallytiedtogetherinthehosttoformasinglenodetominimizevoltagelosses.CardprimarypowerissuppliedthroughtheVCCterminals;flash-memoryprogramminganderasevoltageissuppliedthroughtheVppterminals.Cardbuscardsoftodaytypicallydonotuse12V,whichisnowmoreofanoptionalrequirementinthehost.
DESIGNINGFORVOLTAGEREGULATION
ThecurrentPCMCIAspecificationforoutputvoltageregulation,VO(reg),ofthe5-Voutputis5%(250mV).InatypicalPCpower-systemdesign,thepowersupplyhasanoutput-voltageregulation,VPS(reg),of2%(100mV).Also,avoltagedropfromthepowersupplytothePCCardresultsfromresistivelosses,VPCB,inthePCBtracesandthePCMCIAconnector.Atypicaldesignwouldlimitthetotaloftheseresistivelossestolessthan1%(50mV)oftheoutputvoltage.Therefore,theallowablevoltagedrop,VDS,fortheTPS2220BwouldbethePCMCIAvoltageregulationlessthepowersupplyregulationandlessthePCBandconnectorresistivedrops:
V+V–V–VDSO(reg)PS(reg)PCBTypically,thiswouldleave100mVfortheallowablevoltagedropacrossthe5-Vswitch.Thespecificationfor
outputvoltageregulationofthe3.3-Voutputis300mV;therefore,usingthesameequationbydeductingthevoltagedroppercentages(2%)forpower-supplyregulationandPCBresistiveloss(1%),theallowablevoltagedropforthe3.3-Vswitchis200mV.Thevoltagedropistheoutputcurrentmultipliedbytheswitchresistanceofthedevice.Therefore,themaximumoutputcurrent,IOmax,thatcanbedeliveredtothePCCardinregulationistheallowablevoltagedropacrosstheIC,dividedbytheoutput-switchresistance.
V
Imax+rDSODS(on)TheAVCCoutputshavebeendesignedtodeliverthepeakandaveragecurrentsdefinedbythePCCardspecificationwithinregulationovertheoperatingtemperaturerange.TheAVPPoutputsofthedevicehavebeendesignedtodeliver100mAcontinuously.
OVERCURRENTANDOVERTEMPERATUREPROTECTION
PCCardsareinherentlysubjecttodamagethatcanresultfrommishandling.Hostsystemsrequireprotectionagainstshort-circuitedcardsthatcanleadtopower-supplyorPCBtracedamage.EvenextremelyrobustsystemscanundergorapidbatterydischargeintoadamagedPCCard,resultinginthesuddenandunacceptablelossofsystempower.Incomparison,thereliabilityoffusedsystemsispoorbecauseblownfusesrequiretroubleshootingandrepair,usuallybythemanufacturer.
TheTPS2220Btakesatwo-prongedapproachtoovercurrentprotection,whichisdesignedtoactivateifanoutputisshortedorwhenanovercurrentconditionispresentwhenswitchesarepoweredup.First,insteadoffuses,senseFETsmonitoreachoftheAVCCandAVPPpoweroutputs.Unlikesenseresistorsorpolyfuses,
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APPLICATIONINFORMATION(continued)
theseFETsdonotaddtotheseriesresistanceoftheswitch;therefore,voltageandpowerlossesarereduced.Overcurrentsensingisappliedtoeachoutputseparately.Excessivecurrentgeneratesanerrorsignalthatlimitstheoutputcurrentofonlytheaffectedoutput,preventingdamagetothehost.EachAVCCoutputovercurrentlimitsfrom1Ato2.2A,typicallyaround1.6A;theAVPPoutputslimitfrom100mAto250mA,typicallyaround200mA.
Second,whenanovercurrentconditionisdetected,theTPS2220BassertsanactivelowOCsignalthatcanbemonitoredbythemicroprocessororcontrollertoinitiatediagnosticsand/orsendtheuserawarningmessage.Ifanovercurrentconditionpersists,causingtheICtoexceeditsmaximumjunctiontemperature,thermal-protectioncircuitryactivates,shuttingdownallpoweroutputsuntilthedevicecoolstowithinasafeoperatingregion,whichisensuredbyathermalshutdownhysteresis.ThermallimitingpreventsdestructionoftheICfromoverheatingbeyondthepackagepower-dissipationratings.
Duringpowerup,thedevicescontroltherisetimesoftheAVCCandAVPPoutputsandlimittheinrushcurrentintoalargeloadcapacitance,faultycard,orconnector.
12-VSUPPLYNOTREQUIRED
SomePCCardswitchesusetheexternallysupplied12Vtopowergatedriveandotherchipfunctions,whichrequiresthatpowerbepresentatalltimes.TheTPS2220Boffersconsiderablepowersavingsbyusinganinternalchargepumptogeneratetherequiredhighergatedrivevoltagesfromthe3.3-Vinput.Therefore,theexternal12-VsupplycanbedisabledexceptwhenneededbythePCCardintheslot,therebyextendingbatterylifetime.Aspecialfeatureinthe12-Vcircuitryactuallyhelpstoreducethesupplycurrentdemandedfromthe3.3-Vinput.When12VissuppliedandrequestedattheVPPoutput,avoltageselectioncircuitdrawsthecharge-pumpdrivecurrentforthe12-VFETsfromthe12-Vinput.Thisselectionisautomaticandeffectivelyreducesdemandfluctuationsonthenormal3.3-VVCCrail.Forproperoperationofthisfeature,aminimum3.3-Vinputcapacitanceof4.7µFisrecommended,andaminimum12-Vinputramp-uprateof12V/50ms(240V/s)isrequired.Additionalpowersavingsarerealizedduringasoftwareshutdowninwhichquiescentcurrentdropstoamaximumof1µA.
VOLTAGE-TRANSITIONINGREQUIREMENT
PCCards,likeportables,aremigratingfrom5Vto3.3Vtominimizepowerconsumption,optimizeboardspace,andincreaselogicspeeds.TheTPS2220BmeetsallcombinationsofpowerdeliveryascurrentlydefinedinthePCMCIAstandard.Thelatestprotocolaccommodatesmixed3.3-V/5-Vsystemsbyfirstpoweringthecardwith5V,thenpollingittodetermineits3.3-Vcompatibility.ThePCMCIAspecificationrequiresthatthecapacitorson3.3-V-compatiblecardsbedischargedtobelow0.8Vbeforeapplying3.3-Vpower.Thisactionensuresthatsensitive3.3-Vcircuitryisnotsubjectedtoanyresidual5-Vchargeandfunctionsasapowerreset.PCCardspecificationrequiresthatVCCbedischargedwithin100ms.PCCardresistancecannotbereliedontoprovideadischargepathforvoltagesstoredonPCCardcapacitancebecauseofpossiblehigh-impedanceisolationbypower-managementschemes.ThedevicesincludedischargetransistorsonallAVCCandAVPPoutputstomeetthespecificationrequirement.
SHUTDOWNMODE
Intheshutdownmode,whichcanbecontrolledbySHDNorbitD8oftheinputserialDATAword,eachoftheAVCCandAVPPoutputsisforcedtoahigh-impedancestate.Inthismode,thechipquiescentcurrentisreducedto1µAorlesstoconservebatterypower.
POWER-SUPPLYCONSIDERATIONS
Thedeviceshasmultiplepinsfor5-VpowerinputandfortheswitchedAVCCoutput.Anyindividualpincanconducttheratedinputoroutputcurrent.Unlessallpinsareconnectedinparallel,theseriesresistanceishigherthanthatspecified,resultinginincreasedvoltagedropsandpowerloss.Itisrecommendedthatallinputandoutputpowerpinsbeparalleledforoptimumoperation.
ToincreasethenoiseimmunityoftheTPS2220Bthepower-supplyinputsshouldbebypassedwithatleasta4.7-µFelectrolyticortantalumcapacitorparalleledbya0.047-µFto0.1-µFceramiccapacitor.Itisstrongly
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APPLICATIONINFORMATION(continued)
recommendedthattheswitchedoutputsbebypassedwitha0.1-µF(orlarger)ceramiccapacitor;doingsoimprovestheimmunityoftheICtoelectrostaticdischarge(ESD).CareshouldbetakentominimizetheinductanceofPCBtracesbetweenthedevicesandtheload.Highswitchingcurrentscanproducelargenegativevoltagetransients,whichforwardbiasessubstratediodes,resultinginunpredictableperformance.Similarly,nopinshouldbetakenbelow–0.3V.
RESETINPUT
Toensurethatcardsareinaknownstateafterpowerbrownoutsorsysteminitialization,thePCCardsshouldberesetatthesametimeasthehostbyapplyinglow-impedancepathsfromAVCCandAVPPterminalstoground.Alow-impedanceoutputstateallowsdischargingofresidualvoltageremainingonPCCardfiltercapacitance,permittingthesystem(hostandPCCards)tobepoweredupconcurrently.TheactivelowRESETinputclosesinternalgroundswitchesS1,S4,S7,andS11withallotherswitchesleftopen.TheTPS2220Bremainsinthelow-impedanceoutputstateuntilthesignalisdeassertedandfurtherdataisclockedinandlatched.Theinputserialdatacannotbelatchedduringresetmode.RESETisprovidedfordirectcompatibilitywithsystemsthatuseanactive-lowresetvoltagesupervisor.TheRESETpinhasaninternal150-kΩpullupresistor.
CALCULATINGJUNCTIONTEMPERATURE
Theswitchresistance,rDS(on),isdependentonthejunctiontemperature,TJ,ofthedie.ThejunctiontemperatureisdependentonbothrDS(on)andthecurrentthroughtheswitch.TocalculateTJ,firstfindrDS(on)fromFigure26throughFigure28,usinganinitialtemperatureestimateabout30°Caboveambient.Then,calculatethepowerdissipationforeachswitch,usingtheformula:
P+r I2DDS(on)Next,sumthepowerdissipationofallswitchesandcalculatethejunctiontemperature:
T+P R)T
JDqJAA
where:
RθJA is the inverse of the derating factor given in the dissipation rating table.
ǒȍǓ
Comparethecalculatedjunctiontemperaturewiththeinitialtemperatureestimate.Ifthetemperaturesarenotwithinafewdegreesofeachother,recalculateusingthecalculatedtemperatureastheinitialestimate.
LOGICINPUTSANDOUTPUTS
TheserialinterfaceconsistsoftheDATA,CLOCK,andLATCHleads.Thedataisclockedinonthepositiveedgeoftheclock(seeFigure2).The11-bit(D0-D10)serialdatawordisloadedduringthepositiveedgeofthelatchsignal.Thepositiveedgeofthelatchsignalshouldoccurbeforethenextpositiveedgeoftheclockoccurs.Theserialinterfaceofthedeviceiscompatiblewithserial-interfacePCMCIAcontrollers.
Anovercurrentoutput(OC)isprovidedtoindicateanovercurrentorovertemperatureconditioninanyoftheAVCCandAVPPoutputsaspreviouslydiscussed.
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APPLICATIONINFORMATION(continued)TPS2220BCONTROLLOGIC
AVPP
AVPPCONTROLSIGNALS
D8(SHDN)111110
D000011X
D101101X
D9X01XXX
OUTPUTV_AVPP0V3.3V5V12VHi-ZHi-Z
AVCC
AVCCCONTROLSIGNALSD8(SHDN)11110
D30011X
D20101X
OUTPUTV_AVCC0V3.3V5V0VHi-Z
ESDPROTECTIONS(seeFigure35)AllinputsandoutputsofthesedevicesincorporateESD-protectioncircuitrydesignedtowithstanda2-kVhuman-body-modeldischargeasdefinedinMIL-STD-883C,Method3015.TheAVCCandAVPPoutputscanbeexposedtopotentiallyhigherdischargesfromtheexternalenvironmentthroughthePCCardconnector.Bypassingtheoutputswith0.1-µFcapacitorsprotectsthedevicesfromdischargesupto10kV.
TPS2220BAVCCAVCC0.1 µF†VCCVCCPC CardConnector AAVPP12 V
4.7 µF5 V
4.7 µF0.1 µF0.1 µF5 V5 VControllerDATA3.3 V
4.7 µF0.1 µF3.3 VCLOCKLATCHRESETOCFrom PCI orSystem RSTGPI/ODATACLOCKLATCH12 V0.1 µF†Vpp1Vpp2†
Maximum recommended output capacitance for AVCC is 220 µF including card capacitance, and for AVPP is 10 µF, without OC glitch whenswitches are powered on.
Figure35.DetailedInterconnectionsandCapacitorRecommendations
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12-VFLASHMEMORYSUPPLY
TheTPS6734isafixed12-Voutputboostconvertercapableofdelivering120mAfrominputsaslowas2.7V.Thedeviceispin-for-pincompatiblewiththeMAX734regulatorandoffersthefollowingadvantages:lowersupplycurrent,wideroperatinginput-voltagerange,andhigheroutputcurrents.AsshowninFigure36,theonlyexternalcomponentsrequiredare:aninductor,aSchottkyrectifier,anoutputfiltercapacitor,aninputfiltercapacitor,andasmallcapacitorforloopcompensation.Theentireconverteroccupieslessthan0.7in2ofPCBspacewhenimplementedwithsurface-mountcomponents.Anenableinputisprovidedtoshuttheconverterdownandreducethesupplycurrentto3µAwhen12Visnotneeded.
TheTPS6734isa170-kHzcurrent-modePWM(pulse-widthmodulation)controllerwithann-channelMOSFETpowerswitch.Gatedrivefortheswitchisderivedfromthe12-Voutputafterstart-uptominimizethedieareaneededtorealizethe0.7-ΩMOSFETandimproveefficiencyatinputvoltagesbelow5V.Softstartisaccomplishedwiththeadditionofonesmallcapacitor.A1.22-Vreference,pin2ofTPS6734,isbroughtoutforexternaluse.Foradditionalinformation,seetheTPS6734datasheet(SLVS127).TPS2220B3.3 V or 5 VEnable(see Note A)
R110 kΩ12C133 µF20 V
+34C20.01 µFTPS6734ENREFSSCOMPVCCFBOUTGND8765D133 µF, 20 V+C1AVCCAVCCL118 µHAVPP12 V0.1 µF12 VC40.001 µF5 V1 µF0.1 µF5 V5 VDATACLOCKLATCH3.3 V4.7 µF0.1 µF3.3 V†RESETOCSHDNNOTE A:The enable terminal can be tied to a general-purpose I/O terminal on the PCMCIA controller or tied high.
Figure36.TPS2220BWithTPS673412-V,120-mASupply
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PACKAGEOPTIONADDENDUM
www.ti.com
19-May-2005
PACKAGINGINFORMATION
OrderableDeviceTPS2220BDBTPS2220BDBG4TPS2220BDBRTPS2220BDBRG4TPS2220BPWPTPS2220BPWPR
(1)
Status(1)ACTIVEACTIVEACTIVEACTIVEACTIVEACTIVE
PackageTypeSSOPSSOPSSOPSSOPHTSSOPHTSSOP
PackageDrawingDBDBDBDBPWPPWP
PinsPackageEcoPlan(2)
Qty242424242424
60602000
TBDTBDTBD
Lead/BallFinishCUNIPDAUCUNIPDAUCUNIPDAUCUNIPDAUCUNIPDAUCUNIPDAU
MSLPeakTemp(3)Level-1-220C-UNLIMLevel-1-220C-UNLIMLevel-1-220C-UNLIMLevel-1-260C-UNLIMLevel-1-220C-UNLIMLevel-1-220C-UNLIM
2000Green(RoHS&
noSb/Br)602000
TBDTBD
Themarketingstatusvaluesaredefinedasfollows:ACTIVE:Productdevicerecommendedfornewdesigns.
LIFEBUY:TIhasannouncedthatthedevicewillbediscontinued,andalifetime-buyperiodisineffect.
NRND:Notrecommendedfornewdesigns.Deviceisinproductiontosupportexistingcustomers,butTIdoesnotrecommendusingthispartinanewdesign.
PREVIEW:Devicehasbeenannouncedbutisnotinproduction.Samplesmayormaynotbeavailable.OBSOLETE:TIhasdiscontinuedtheproductionofthedevice.
(2)
EcoPlan-Theplannedeco-friendlyclassification:Pb-Free(RoHS)orGreen(RoHS&noSb/Br)-pleasecheckhttp://www.ti.com/productcontentforthelatestavailabilityinformationandadditionalproductcontentdetails.TBD:ThePb-Free/Greenconversionplanhasnotbeendefined.
Pb-Free(RoHS):TI'sterms\"Lead-Free\"or\"Pb-Free\"meansemiconductorproductsthatarecompatiblewiththecurrentRoHSrequirementsforall6substances,includingtherequirementthatleadnotexceed0.1%byweightinhomogeneousmaterials.Wheredesignedtobesolderedathightemperatures,TIPb-Freeproductsaresuitableforuseinspecifiedlead-freeprocesses.
Green(RoHS&noSb/Br):TIdefines\"Green\"tomeanPb-Free(RoHScompatible),andfreeofBromine(Br)andAntimony(Sb)basedflameretardants(BrorSbdonotexceed0.1%byweightinhomogeneousmaterial)
(3)
MSL,PeakTemp.--TheMoistureSensitivityLevelratingaccordingtotheJEDECindustrystandardclassifications,andpeaksoldertemperature.
ImportantInformationandDisclaimer:TheinformationprovidedonthispagerepresentsTI'sknowledgeandbeliefasofthedatethatitisprovided.TIbasesitsknowledgeandbeliefoninformationprovidedbythirdparties,andmakesnorepresentationorwarrantyastotheaccuracyofsuchinformation.Effortsareunderwaytobetterintegrateinformationfromthirdparties.TIhastakenandcontinuestotakereasonablestepstoproviderepresentativeandaccurateinformationbutmaynothaveconducteddestructivetestingorchemicalanalysisonincomingmaterialsandchemicals.TIandTIsuppliersconsidercertaininformationtobeproprietary,andthusCASnumbersandotherlimitedinformationmaynotbeavailableforrelease.
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Addendum-Page1
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元器件交易网www.cecb2b.comMECHANICAL DATAMSSO002E – JANUARY 1995 – REVISED DECEMBER 2001DB (R-PDSO-G**) 28 PINS SHOWN0,65280,380,22150,15MPLASTIC SMALL-OUTLINE0,250,095,605,008,207,40Gage Plane1A140°–ā8°0,250,950,55Seating Plane2,00 MAX0,05 MIN0,10PINS **DIMA MAX146,50166,50207,50248,502810,503010,503812,90A MIN5,905,906,907,909,909,9012,304040065/E 12/01NOTES:A.B.C.D.All linear dimensions are in millimeters.This drawing is subject to change without notice.Body dimensions do not include mold flash or protrusion not to exceed 0,15.Falls within JEDEC MO-150POST OFFICE BOX 655303 DALLAS, TEXAS 75265•元器件交易网www.cecb2b.com
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